peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 277

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

FEBM
AISX
MFM
MDIS
ECM
Data Sheet
Error Counter Mode
DS3 errors are counted in background and copied to foreground (error
counter registers) when condition selected via ECM is met.
0
1
Far End Block Error (FEBE) Mode
This bit selects the event which leads to FEBE indication. It is available
in C-bit parity mode only.
0
1
AIS X-bit Check Disable
This bit disables checking of the X-bit for AIS and idle detection.
0
1
Multiframe Framing Mode
This bit selects the M-bit error condition which triggers the DS3 framer to
start a new frame search. To enable reframing in case of M-bit errors
MDIS must be set to ‘0’.
0
1
Multiframe Reframe Disable
This bit disables reframing due to M-bit errors.
0
1
Counter values are copied to foreground when copy command is
executed. See also register DS3COM.
The counter values are copied to the foreground register in one
second intervals. At the same time the background registers are
reset to zero. This operation is synchronous with the periodic one
second interrupt which alerts software to read the register.
Receive multiframe parity error.
Receive multiframe parity error or framing error.
Check X-bit.
Disable check of X-bit.
Start new F-frame search if M-bit errors are detected in two out
of four consecutive M-frames.
Start new F-frame search if M-bit errors are detected in three out
of four consecutive M-frames.
Enable reframe due to M-bit errors.
Disable reframe due to M-bit errors.
277
Register Description
PEB 3456 E
05.2001