peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 39

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peb3456

Manufacturer Part Number
peb3456
Description
Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
2.6
Data Sheet
AB25
V23
Pin No.
D12
A11
Pin No.
Serial Interface
LHLDA
or
LBG
LBGACK
Symbol
CTCLK
CTFS
Symbol
Output (O)
Output (O)
Input (I)
Input (I)
O
I
I
I
I
39
Hold (Intel Bus Mode)
LHLDA
processor has released control of the
local bus.
Bus Grant (Motorola Bus Mode)
LBG indicates that the TE3-CHATT may
access the local bus.
Bus Grant Acknowledge (Motorola
Bus Mode)
LBGACK is driven low when the TE3-
CHATT has become bus master.
When local bus master functionality is
disabled this output is tri-state.
Function
Common Transmit Clock
CTCLK is the external transmit clock for
the T1 or E1 tributaries configured in
external timing mode.
Common
Synchronization
CTFS is used to synchronize the T1/E1
transmit lines, which are clocked with
CTCLK in external timing mode.
If not used CTFS should be connected to
V
SS
.
indicates
Function
Transmit
that
Pin Description
the
PEB 3456 E
external
Frame
05.2001

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