peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 318

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

TURIMSK
Test Unit Receive Interrupt Mask Register
Access
Address
Reset Value
This register provides the interrupt masks for the test unit interrupts. Generation of an
interrupt vector itself does not necessarily result in assertion of the interrupt pin. For
description of interrupt concept and interrupt vectors see
Page
The following definition applies:
1
0
ERXM
BED
ALL1
LOS
SYN
AIM flags have same layout as the above five mask but are internal masks that are set
automatically following the interrupt in the AIM mode. This mask prevents excessive bus
load in error conditions. AIM flags are cleared by the TURCOM.CAIM command. They
are “read only” flags in this register.
Data Sheet
15
0
137.
0
0
: read/write
: 2AC
: 001F
The corresponding interrupt vector will not be generated by the device.
The corresponding interrupt vector will be generated.
Mask ’End of Receive Error Rate Measurement’
Mask ’Bit Error Detected’
Mask ’All ‘1’ Pattern Received’
Mask ’Loss of Signal’
Mask ’Change in Receiver Synchronization State’
12
H
H
(PCI), D6
AIM(4:0)
H
(Local bus)
8
318
0
0
0
“Layer One Interrupts” on
ERXM BED ALL1 LOS SYN
4
Register Description
3
2
PEB 3456 E
1
05.2001
0