peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 157

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

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Figure 5-7
•
Figure 5-8
Data Sheet
LBGACK
Cycle
LBR
LBG
Bus
LCS1,2 (Out)
LCS0 (In)
LDTACK
LA(12:0)
LD(15:0)
LSIZE0
LRDWR
Note 1: Supported in local bus master mode only.
Note 2: LDTACK controlled bus cycles only.
LDS
Motorola Bus Mode
Motorola Bus Arbitration
1
2
1
2
Read Cycle (8 bit
transaction is in progress or while the latency
Address
read/write cycles as bus master
LBGACK remains asserted as long as a
Data
RD/WR Cycle
157
One or more
1
)
timer is not expired.
Write Cycle (16 bit)
Address
Interface Description
3
Data
PEB 3456 E
05.2001