peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 289

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peb3456

Manufacturer Part Number
peb3456
Description
Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
D3RFEC
DS3 Receive Framing Bit Error Counter
Address
Reset Value
FEC(15:0)
D3RCVE
DS3 Receive B3ZS Code Violation Error Counter
Access
Address
Reset Value
CVE(15:0)
Access
Data Sheet
15
15
: read/write
: 1E0
: 0000
B3ZS Code Violation Errors
Error counter mode (Clear on Read or Errored Second) depends on
register D3RCFG.ECM.
Count of B3ZS Code Violation errors. The error counter will not be
incremented during asynchronous state.
: read/write
: 1E4
: 0000
Framing Bit Error Counter
Error counter mode (Clear on Read or Errored Second) depends on
register D3RCFG.ECM.
Count of F-bit and M-bit errors. Errors are not counted in out of frame
state.
H
H
H
H
(PCI), 70
(PCI), 72
H
H
(Local bus)
(Local bus)
CVE(15:0)
FEC(15:0)
289
Register Description
PEB 3456 E
05.2001
0
0

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