peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 35

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peb3456

Manufacturer Part Number
peb3456
Description
Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
2.4
Data Sheet
Pin No.
P2
P1
N4
N3
P4
SPI Interface
Symbol
SPI
SPO
SPCLK
SPCS
SPLOAD
Output (O)
Input (I)
O
O
O
I
I
35
Function
SPI Serial Input
SPI is a data input pin, where data coming
from an external EEPROM is shifted in.
SPI is sampled on the rising edge of
SPCLK.
recommended if the SPI interface is not
used.
SPI Serial Output
SPO is a push/pull serial data output pin.
Opcodes, byte addresses and data is
updated on the falling edge of SPCLK. It
is tri-state during reset.
SPI Clock Signal
SPCLK controls the serial bus timing of
the SPI bus. SPCLK is derived from the
PCI bus clock with a frequency of 1/78 of
the PCI bus clock. It is tri-state during
reset.
SPI Chip Select
SPCS is used to select an external
EEPROM. It is tri-state during reset.
Enable SPI Load Functionality
Connecting SPLOAD to V
SPI bus after reset. In this case parts of
the PCI configuration space can be
configured via an external EEPROM.
A
pull-up
Pin Description
DD3
PEB 3456 E
resistor
enables the
05.2001
is

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