peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 4

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

Revision History:
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Major changes to document since last version
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Data Sheet
Page
Description
Pin Diagram Added
Corrected Part Number from 0076 to 0077.
Swap the bit positions of TBRTC and TBFTC In the CSPEC_BUFFER
register as their bit postitions were not correct in the preliminary data sheet.
Swap the postions of TBRTC with TBFTC in Table 8-7, as their column
positions were not correct in the preliminary data sheet
Fixed typo in CSPEC_IMASK register, replaced ROFD with RFOD
Fixed typo in IQMASK, replaced ROFD with RFOD
Added note to clarify configuration of FDL links 28 and 29.
Added special programming note for reseting D3CLKCS register
Added text to clarify function of TXBIT in D3TCOM
Reset value of D3TCOM Register was incorrectly documented.
Note added to recommend seting register D3TCOM to 0070 after reset, for
normal operation.
some time.
some time
Update voltage min/max information for
Ratings
Update timing Information for
Interface Pins)
Update timing Information for
Update timing Information for
Characteristics
Update timing Information for
Intel Bus Interface Timing Diagram modified. The setup and hold times for
“LD to LRDY” was not a valid timing parameter. Instead, the setup and hold
parameters for “LD to LRD” were specified.
Note added to explain that reset value of D3RSTAT will be different after
Note added to explain that reset value of D2RSTAT will be different after
05.2001
Preliminary Data Sheet 11.1999
Table 9-4 DC Characteristics (PCI
Table 9-5 PCI Clock Characteristics
Table 9-6 PCI Interface Signal
Table 9-8 Intel Bus Interface Timing
4
Table 9-1 Absolute Maximum
PEB 3456 E
DS2
05.2001