peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 137

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

and can be read from either the local microprocessor or (for test purposes) via the chip
internal bridge from the host processor located on the PCI bus.
The T1/E1 framer, the facility data link, the M13 multiplexer and DS2/DS3 framer, and
the mailbox forward their specific interrupts to the internal interrupt FIFO. The interrupt
FIFO triggers the LINT pin which indicates that there is at least one interrupt vector
4.13.2
All layer one related interrupts, that is interrupts issued by either the T1/E1 framer, the
M13 multiplexer and DS2/DS3 framer, the facility data link or the PCI to Local Bus
mailbox, are stored in an internal interrupt FIFO which is located inside the TE3-CHATT
available. The interrupt FIFO then can be read from either PCI side or local bus side. The
interrupt vector contains a coding for the interrupt reason and a last indication when
there is no further interrupt vector stored in the internal interrupt FIFO. The interrupts of
the internal layer one interrupt FIFO or the local bus interrupt LINT can also be reported
via pin INTA.
•
Figure 4-19 Framer, M13 and Facility Data Link and Mailbox Interrupt Notification
Data Sheet
Int. ve ctor s e tup:
MSK
Facility data
notification on INTA
link
optional interrupt
Layer One Interrupts
Microprocessor
3
IV
Int. ve ctor s e tup:
IMR
Framer
EBU
Interrupt FIFO
1
2
137
Int. ve ctor s e tup:
[]
Test unit
Interrupt bus II
M13
1. Interrupt source forwards interrupt
2. Interrupt controller asserts LINT (if
3. Microprocessor reads interrupt FIFO.
LINT
Inte r r upt Contr ol:
INTCTRL
Inte r r upt s tatus :
INTFIFO
vector to interrupt FIFO.
enabled).
Local uP interface
Functional Description
Int. ve ctor s e tup:
FCONF.MID
TE3-CHATT
Mailbox
PEB 3456 E
05.2001