peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 299

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

Access
Address
Reset Value
ESIMC
C2NC
C2C
D2RCOM
DS2 Receive Command Register
Data Sheet
15
0
0
0
: read/write
: 228
: 0000
Error Simulation Code
This bit field enables error simulation. During error simulation the device
generates error interrupts and error status messages. Nevertheless the
service is not affected.
0
1
2
3
4
5
6
Copy DS2 Error Counters
Only valid when D2RCFG.ECM is set to ‘0’. Values of DS2 background
registers are copied to foreground. Background registers are NOT
cleared. Command is self clearing and completes before next register
access is possible i.e. software can write command and then
immediately read the counters without starting a delay timer.
0
1
Copy and Clear DS2 Error Counters
Only valid when D2RCFG.ECM is set to ‘0’. Values of DS2 background
registers are copied to foreground. Background registers are cleared.
0
H
H
(PCI), 94
Normal operation (no error simulation)
Simulate 2 receive F-bit errors/multiframe (186 sec)
Simulate
2 receive M-bit errors/multiframe (186 sec) (DS-1 mode)
Receive parity error/multiframe (133 sec) (ITU-T G.747 mode)
Simulate remote alarm
Simulate loss of frame (RED alarm timer)
Simulate AIS (AIS alarm timer)
Simulate receive loop command
No operation.
Copy background counters to foreground.
0
0
H
(Local bus)
0
0
299
0
6
ESIMC(2:0)
4
Register Description
0
0
PEB 3456 E
C2NC C2C
1
05.2001
0