peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 350

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

RFMR1
T1/E1 Receive Mode Register 1
Access
Address
Reset Value
FRST
EACM
ECM
Data Sheet
15
0
0
0
: read/write
: 0A
: 0000
Force Resynchronization Timer
This bit field defines the time after which the framer automatically starts
resynchronization if Emulator Automatic Check Mode is enabled.
0..7
Enable Emulator Automatic Check Mode
This bit enables automatic resynchronization mode. After loss of frame
the receive framer starts resynchronization after (FRST+1)*8ms when
frame search is not started by system software. If EACM is disabled
system software has to force resynchronization by setting bit
RCMDR.FRS.
Error Counter Mode
0
1
0
H
H
Automatic resynchronization after (FRST+1)*8 milliseconds.
Unbuffered error counter mode. Counters are updated when
respective error occurs. Counter registers are directly readable
and cleared automatically at the end of a read cycle.
Buffered error counter mode. Actual error counts are hidden from
user and updated in background. The counter is copied to the bus
register at one second intervals and reset automatically. This
operation is synchronous with the periodic one second interrupt
which alerts software to read the register.
0
0
0
0
350
0
0
0
4
FRST(2:0)
Register Description
2
PEB 3456 E
EACM ECM
1
05.2001
0