peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 114

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

found for the multiframe alignment pattern in each of the seven DS3 subframes. When
alignment is still valid frame alignment is declared. The P-bits and the X-bits are ignored
during synchronization.
Loss of frame is declared, when 3 out of 8 or 3 out of 16 incorrect F-bits are found or
when one or more incorrect M-bits are found in 3 out of 4 subframes.
4.10.1.2 Multiplexer/Demultiplexer
three bits out of C
which is assigned to the i
Multiplexer
The multiplexer combines seven DS2 signals to form a DS3 signal. If not sufficient data
is available for a DS2 signal, it automatically inserts a stuffing bit and sets the bits C
C
4.10.1.3 X-bit
The TE3-CHATT provides access to the X-bit of each tributary via an internal registers.
Data written to the X-bit register is copied to an internal shadow register which is then
locked for one second after each write access.
4.10.1.4 Alarm Indication Signal, Idle Signal
Detection
Alarm indication signal or Idle signal is declared, when the selected signal format was
received with less than 8/15 bit errors (selectable via bit D3RAP.AIS) for at least one
multiframe. The alarm indication signal can be selected as:
• Unframed all ’1’s
[84]
4.10.1.1 Synchronization Procedure
The integrated DS3 framer searches for the frame alignment pattern ’1001’ and when
the multiframe alignment pattern is found in three consecutive DS3 frames while frame
Demultiplexer
The demultiplexer extracts seven DS2 signals from the incoming DS3 signal. If two or
Data Sheet
i2
These bits represent a data block, which consists of 84 bits.
[84] consists of seven time slots with 12 bits each and they are assigned to one of the seven
participating DS2 signals.
, C
i3
assigned to the i
i1
, C
i2
, C
th
th
i3
DS2 signal to ’1’.
DS2 signal is discarded.
are set to ’1’ the first bit following the F
114
Functional Description
1
bit in the i
PEB 3456 E
th
subframe
05.2001
i1
,