ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 99

• Manufacturer Part Number: ep1agx50d
• Description: Arria Gx Device Data Sheet
• Manufacturer: Altera Corporation

Figure 2–62. Global and Regional Clock Connections from Center Clock Pins and Fast PLL Outputs
Note to
(1)
Altera Corporation
May 2008
The global or regional clocks in a fast PLL's quadrant can drive the fast PLL input. A dedicated clock input pin or
other PLL must drive the global or regional source. The source cannot be driven by internally generated logic before
driving the fast PLL.
CLK0
CLK1
CLK2
CLK3
Figure
2–62:
PLL 1
PLL 2
Fast
Fast
C0
C1
C2
C3
C0
C1
C2
C3
RCLK0
RCLK1
RCLK2
RCLK3
RCLK4
RCLK5
RCLK6
RCLK7
Arria GX Device Handbook, Volume 1
GCLK0
GCLK1
GCLK2
GCLK3
Arria GX Architecture
Signal Input
Logic Array
To Clock
Network
Note (1)
2–91