ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 129

• Manufacturer Part Number: ep1agx50d
• Description: Arria Gx Device Data Sheet
• Manufacturer: Altera Corporation

Altera Corporation
May 2008
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For more information about differential on-chip termination, refer to the
High-Speed Differential I/O Interfaces with DPA in Arria GX Devices
in volume 2 of the Arria GX Device Handbook.
For more information about tolerance specifications for differential
on-chip termination, refer to the
volume 1 of the Arria GX Device Handbook.
On-Chip Series Termination
Arria GX devices support driver impedance matching to provide the I/O
driver with controlled output impedance that closely matches the
impedance of the transmission line. As a result, reflections can be
significantly reduced. Arria GX devices support on-chip series
termination for single-ended I/O standards with typical R
and 50 Ω . Once matching impedance is selected, current drive strength is
no longer selectable.
support on-chip series termination.
For more information about series on-chip termination supported by
Arria GX devices, refer to the
chapter in volume 2 of the Arria GX Device Handbook.
For more information about tolerance specifications for on-chip
termination without calibration, refer to the
Characteristics
MultiVolt I/O Interface
The Arria GX architecture supports the MultiVolt I/O interface feature
that allows Arria GX devices in all packages to interface with systems of
different supply voltages. Arria GX VCCINT pins must always be
connected to a 1.2-V power supply. With a 1.2-V V
are 1.2-, 1.5-, 1.8-, 2.5-, and 3.3-V tolerant. The VCCIO pins can be
connected to either a 1.2-, 1.5-, 1.8-, 2.5-, or 3.3-V power supply,
depending on the output requirements. The output levels are compatible
with systems of the same voltage as the power supply (for example, when
VCCIO pins are connected to a 1.5-V power supply, the output levels are
compatible with 1.5-V systems). Arria GX VCCPD power pins must be
connected to a 3.3-V power supply. These power pins are used to supply
the pre-driver power to the output buffers, which increases the
performance of the output pins. The VCCPD pins also power
configuration input pins and JTAG input pins.
chapter in volume 1 of the Arria GX Device Handbook.
Table 2–26
Selectable I/O Standards in Arria GX Devices
shows the list of output standards that
DC & Switching Characteristics
Arria GX Device Handbook, Volume 1
DC & Switching
CCINT
Arria GX Architecture
level, input pins
S
values of 25
chapter in
chapter
2–121