ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 42

• Manufacturer Part Number: ep1agx50d
• Description: Arria Gx Device Data Sheet
• Manufacturer: Altera Corporation

Transceivers
2–34
Arria GX Device Handbook, Volume 1
Figure 2–24. Regional Clock Resources in Arria GX Devices
For the regional or global clock network to route into the transceiver, a
local route input output (LRIO) channel is required. Each LRIO clock
region has up to eight clock paths and each transceiver block has a
maximum of eight clock paths for connecting with LRIO clocks. These
resources are limited and determine the number of clocks that can be used
between the PLD and transceiver blocks.
number of LRIO resources available for Arria GX devices with different
number of transceiver blocks.
Region0
8 LRIO clock
Region1
8 LRIO clock
Table 2–7. Available Clocking Connections for Transceivers in EP1AGX35D,
EP1AGX50D, and EP1AGX60D
CLK[3..0]
Source
7
1
2
8
RCLK
RCLK
[3..0]
[7..4]
Global Clock
v
v
Clock Resource
[31..28]
RCLK
RCLK
[11..8]
CLK[15..12]
CLK[7..4]
RCLK 20-27
RCLK 12-19
11 5
12 6
Regional
Clock
[27..24]
[15..12]
RCLK
RCLK
Tables 2–7
8 Clock I/O
Bank13
v
[23..20]
[19..16]
RCLK
RCLK
and
Altera Corporation
Transceiver
2–8
Transceiver
Transceiver
give the
Arria GX
Arria GX
Block
Block
8 Clock I/O
May 2008
Bank14
v