8.10.00 J-TRACE ARM Segger Microcontroller Systems, 8.10.00 J-TRACE ARM Datasheet - Page 196

• Manufacturer Part Number: 8.10.00 J-TRACE ARM
• Description: JTAG EMULATOR ARM7/ARM9 ETM
• Manufacturer: Segger Microcontroller Systems
• Type: Emulatorr

Specifications of 8.10.00 J-TRACE ARM

• Contents: Emulation Module
• For Use With/related Products: ARM7, ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 899-1006

196
9.4
9.4.1
9.4.2
9.4.3
9.4.4
9.4.4.1 J-Flash - Complete flash programming solution
J-Link / J-Trace (UM08001)
J-Link / J-Trace comes with a DLL, which allows - amongst other functionalities -
reading and writing RAM, CPU registers, starting and stopping the CPU, and setting
breakpoints. The standard DLL does not have API functions for flash programming.
However, the functionality offered can be used to program the flash. In that case, a
flashloader is required.
This requires extra code. This extra code typically downloads a program into the RAM
of the target system, which is able to erase and program the flash. This program is
called RAM code and "knows" how to program the flash; it contains an implementa-
tion of the flash programming algorithm for the particular flash. Different flash chips
have different programming algorithms; the programming algorithm also depends on
other things such as endianess of the target system and organization of the flash
memory (for example 1 * 8 bits, 1 * 16 bits, 2 * 16 bits or 32 bits). The RAM code
requires data to be programmed into the flash memory. There are 2 ways of supply-
ing this data: Data download to RAM or data download via DCC.
The data (or part of it) is downloaded to an other part of the RAM of the target sys-
tem. The Instruction pointer (R15) of the CPU is then set to the start address of the
Ram code, the CPU is started, executing the RAM code. The RAM code, which con-
tains the programming algorithm for the flash chip, copies the data into the flash
chip. The CPU is stopped after this. This process may have to be repeated until the
entire data is programmed into the flash.
In this case, the RAM code is started as described above before downloading any
data. The RAM code then communicates with the host computer (via DCC, JTAG and
J-Link / J-Trace), transferring data to the target. The RAM code then programs the
data into flash and waits for new data from the host. The WriteMemory functions of J-
Link / J-Trace are used to transfer the RAM code only, but not to transfer the data.
The CPU is started and stopped only once. Using DCC for communication is typically
faster than using WriteMemory for RAM download because the overhead is lower.
There are different solutions available to program internal or external flashes con-
nected to ARM cores using J-Link / J-Trace. The different solutions have different
fields of application, but of course also some overlap.
J-Flash is a stand-alone Windows application, which can read / write data files and
program the flash in almost any ARM system. J-Flash requires an extra license from
SEGGER.
Flash programming
How does flash programming via J-Link / J-Trace work?
Data download to RAM
Data download via DCC
Available options for flash programming
CHAPTER 9
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
Background information