8.10.00 J-TRACE ARM Segger Microcontroller Systems, 8.10.00 J-TRACE ARM Datasheet - Page 134
![JTAG EMULATOR ARM7/ARM9 ETM](/photos/9/27/92738/8_10_00-j-trace-arm_sml.jpg)
8.10.00 J-TRACE ARM
Manufacturer Part Number
8.10.00 J-TRACE ARM
Description
JTAG EMULATOR ARM7/ARM9 ETM
Manufacturer
Segger Microcontroller Systems
Type
Emulatorr
Specifications of 8.10.00 J-TRACE ARM
Contents
Emulation Module
For Use With/related Products
ARM7, ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
899-1006
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134
5.11.1.8 map ram
5.11.1.9 map reset
5.11.1.10 SetAllowSimulation
5.11.1.11 SetCheckModeAfterRead
J-Link / J-Trace (UM08001)
This command should be used to define an area in RAM of the target device. The area
must be 256-byte aligned. The data which was located in the defined area will not be
corrupted. Data which resides in the defined RAM area is saved and will be restored if
necessary. This command has to be executed before map
called.
Typical applications
Refer to chapter Fast GPIO bug on page 163 for an example.
Syntax
map ram <StartAddressOfArea>-<EndAddressOfArea>
Example
map ram 0x40000000-0x40003fff;
This command restores the default memory mapping, which means all memory
accesses are permitted.
Typical applications
Used with other "map" commands to return to the default values. The map reset
command should be called before any other "map" command is called.
Syntax
map reset
Example
map reset
This command can be used to enable or disable the instruction set simulation. By
default the instruction set simulation is enabled.
Syntax
SetAllowSimulation = 0 | 1
Example
SetAllowSimulation 1
This command is used to enable or disable the verification of the CPSR (current pro-
cessor status register) after each read operation. By default this check is enabled.
However this can cause problems with some CPUs (e.g. if invalid CPSR values are
returned). Please note that if this check is turned off (SetCheckModeAfterRead = 0),
the success of read operations cannot be verified anymore and possible data aborts
are not recognized.
Typical applications
This verification of the CPSR can cause problems with some CPUs (e.g. if invalid CPSR
values are returned). Note that if this check is turned off (SetCheckModeAfterRead =
0), the success of read operations cannot be verified anymore and possible data
aborts are not recognized.
// Enables instruction set simulation
CHAPTER 5
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
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