8.10.00 J-TRACE ARM Segger Microcontroller Systems, 8.10.00 J-TRACE ARM Datasheet - Page 131

• Manufacturer Part Number: 8.10.00 J-TRACE ARM
• Description: JTAG EMULATOR ARM7/ARM9 ETM
• Manufacturer: Segger Microcontroller Systems
• Type: Emulatorr

Specifications of 8.10.00 J-TRACE ARM

• Contents: Emulation Module
• For Use With/related Products: ARM7, ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 899-1006

5.11 Command strings
5.11.1 List of available commands
J-Link / J-Trace (UM08001)
The behavior of the J-Link can be customized via command strings passed to the
JLinkARM.dll which controls J-Link. Applications such as the J-Link Commander, but
also the C-SPY debugger which is part of the IAR Embedded Workbench, allow pass-
ing one or more command strings. Command line strings can be used for passing
commands to J-Link (such as switching on target power supply), as well as customize
the behavior (by defining memory regions and other things) of J-Link. The use of
command strings enables options which can not be set with the configuration dialog
box provided by C-SPY.
The table below lists and describes the available command strings.
Table 5.11: Available command line options
device
DisableFlashBPs
DisableFlashDL
EnableFlashBPs
EnableFlashDL
map exclude
map indirectread
map ram
map reset
SetAllowSimulation
SetCheckModeAfterRead
SetResetPulseLen
SetResetType
SetRestartOnClose
SetDbgPowerDownOnClose
SetSysPowerDownOnIdle
SupplyPower
SupplyPowerDefault
Command
Selects the target device.
Disables the FlashPB feature.
Disables the J-Link ARM FlashDL feature.
Enables the FlashPB feature.
Enables the J-Link ARM FlashDL feature.
Ignore all memory accesses to specified area.
Specifies an area which should be read indirect.
Specifies location of target RAM.
Restores the default mapping, which means all mem-
ory accesses are permitted.
Enable/Disable instruction set simulation.
Enable/Disable CPSR check after read operations.
Defines the length of the RESET pulse in milliseconds.
Selects the reset strategy
Specifies restart behavior on close.
Used to power-down the debug unit of the target CPU
when the debug session is closed.
Used to power-down the target CPU, when there are
no transmissions between J-Link and target CPU, for a
specified timeframe.
Activates/Deactivates power supply over pin 19 of the
JTAG connector.
Activates/Deactivates power supply over pin 19 of the
JTAG connector permanently.
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
Description
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