8.10.00 J-TRACE ARM Segger Microcontroller Systems, 8.10.00 J-TRACE ARM Datasheet - Page 15

• Manufacturer Part Number: 8.10.00 J-TRACE ARM
• Description: JTAG EMULATOR ARM7/ARM9 ETM
• Manufacturer: Segger Microcontroller Systems
• Type: Emulatorr

Specifications of 8.10.00 J-TRACE ARM

• Contents: Emulation Module
• For Use With/related Products: ARM7, ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 899-1006

6 Flash download and flash breakpoints.........................................................................141
7 Device specifics ...........................................................................................................153
J-Link / J-Trace (UM08001)
5.4
5.4.1
5.4.2
5.5
5.5.1
5.5.2
5.5.3
5.6
5.6.1
5.6.2
5.6.3
5.7
5.7.1
5.8
5.8.1
5.8.2
5.9
5.9.1
5.9.2
5.9.3
5.10
5.10.1
5.10.2
5.10.3
5.10.4
5.10.5
5.10.6
5.11
5.11.1
5.11.2
5.12
5.13
5.13.1
5.13.2
5.13.3
5.13.4
6.1
6.2
6.3
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.5
6.5.1
6.5.2
6.5.3
6.5.4
7.1
7.1.1
7.2
7.2.1
7.2.2
7.3
7.3.1
SWD interface ....................................................................................... 103
SWD speed ........................................................................................... 103
SWO .................................................................................................... 103
Multi-core debugging ............................................................................. 105
How multi-core debugging works ............................................................. 105
Using multi-core debugging in detail ........................................................ 106
Things you should be aware of ................................................................ 107
Connecting multiple J-Links / J-Traces to your PC ...................................... 109
How does it work? ................................................................................. 109
Configuring multiple J-Links / J-Traces ..................................................... 110
Connecting to a J-Link / J-Trace with non default USB-Address .................... 111
J-Link control panel................................................................................ 112
Tabs .................................................................................................... 112
Reset strategies .................................................................................... 118
Strategies for ARM 7/9 devices ................................................................ 118
Strategies for Cortex-M devices ............................................................... 120
Using DCC for memory access ................................................................. 122
What is required? .................................................................................. 122
Target DCC handler ............................................................................... 122
Target DCC abort handler ....................................................................... 122
J-Link script files ................................................................................... 123
Actions that can be customized ............................................................... 123
Script file API functions .......................................................................... 123
Global DLL variables .............................................................................. 126
Global DLL constants.............................................................................. 128
Script file language ................................................................................ 129
Executing J-Link script files ..................................................................... 130
Command strings .................................................................................. 131
List of available commands ..................................................................... 131
Using command strings .......................................................................... 137
Switching off CPU clock during debug ....................................................... 139
Cache handling...................................................................................... 140
Cache coherency ................................................................................... 140
Cache clean area ................................................................................... 140
Cache handling of ARM7 cores................................................................. 140
Cache handling of ARM9 cores................................................................. 140
Introduction.......................................................................................... 142
Licensing .............................................................................................. 143
Supported devices ................................................................................. 145
Setup for different debuggers (internal flash) ............................................ 146
IAR Embedded Workbench ...................................................................... 146
Keil MDK .............................................................................................. 147
J-Link GDB Server ................................................................................. 149
J-Link RDI ............................................................................................ 149
Setup for different debuggers (CFI flash) .................................................. 150
IAR Embedded Workbench / Keil MDK ...................................................... 150
J-Link GDB Server ................................................................................. 151
J-Link commander ................................................................................. 151
J-Link RDI ............................................................................................ 151
Analog Devices...................................................................................... 154
ADuC7xxx ............................................................................................ 154
ATMEL ................................................................................................. 156
AT91SAM7............................................................................................ 156
AT91SAM9............................................................................................ 158
Freescale.............................................................................................. 159
Unlocking Kinetis K40 and K60 devices ..................................................... 159
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
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