8.10.00 J-TRACE ARM Segger Microcontroller Systems, 8.10.00 J-TRACE ARM Datasheet - Page 175

JTAG EMULATOR ARM7/ARM9 ETM

8.10.00 J-TRACE ARM

Manufacturer Part Number
8.10.00 J-TRACE ARM
Description
JTAG EMULATOR ARM7/ARM9 ETM
Manufacturer
Segger Microcontroller Systems
Type
Emulatorr

Specifications of 8.10.00 J-TRACE ARM

Contents
Emulation Module
For Use With/related Products
ARM7, ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
899-1006
J-Link / J-Trace (UM08001)
Table 8.3: J-Link / J-Trace SWD pinout
Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They
should also be connected to GND in the target system.
15
17
19
PIN
RESET
Not used NC
5V-Sup-
ply
SIGNAL
I/O
Output
TYPE
Target CPU reset signal. Typically connected to the RESET
pin of the target CPU, which is typically called "nRST",
"nRESET" or "RESET".
This pin is not connected in J-Link.
This pin can be used to supply power to the target hard-
ware. Older J-Links may not be able to supply power on this
pin. For more information about how to enable/disable the
power supply, please refer to Target power supply on
page 176.
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
Description
175

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