8.10.00 J-TRACE ARM Segger Microcontroller Systems, 8.10.00 J-TRACE ARM Datasheet - Page 139
8.10.00 J-TRACE ARM
Manufacturer Part Number
8.10.00 J-TRACE ARM
Description
JTAG EMULATOR ARM7/ARM9 ETM
Manufacturer
Segger Microcontroller Systems
Type
Emulatorr
Specifications of 8.10.00 J-TRACE ARM
Contents
Emulation Module
For Use With/related Products
ARM7, ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
899-1006
- Current page: 139 of 222
- Download datasheet (3Mb)
5.12 Switching off CPU clock during debug
J-Link / J-Trace (UM08001)
We recommend not to switch off CPU clock during debug. However, if you do, you
should consider the following:
Non-synthesizable cores (ARM7TDMI, ARM9TDMI, ARM920, etc.)
With these cores, the TAP controller uses the clock signal provided by the emulator,
which means the TAP controller and ICE-Breaker continue to be accessible even if the
CPU has no clock.
Therefore, switching off CPU clock during debug is normally possible if the CPU clock
is periodically (typically using a regular timer interrupt) switched on every few ms for
at least a few us. In this case, the CPU will stop at the first instruction in the ISR
(typically at address 0x18).
Synthesizable cores (ARM7TDMI-S, ARM9E-S, etc.)
With these cores, the clock input of the TAP controller is connected to the output of a
three-stage synchronizer, which is fed by clock signal provided by the emulator,
which means that the TAP controller and ICE-Breaker are not accessible if the CPU
has no clock.
If the RTCK signal is provided, adaptive clocking function can be used to synchronize
the JTAG clock (provided by the emulator) to the processor clock. This way, the JTAG
clock is stopped if the CPU clock is switched off.
If adaptive clocking is used, switching off CPU clock during debug is normally possi-
ble if the CPU clock is periodically (typically using a regular timer interrupt) switched
on every few ms for at least a few us. In this case, the CPU will stop at the first
instruction in the ISR (typically at address 0x18).
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
139
Related parts for 8.10.00 J-TRACE ARM
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CONNECTOR JTAG-ARM ISOLATION
Manufacturer:
Segger Microcontroller Systems
Datasheet:
Part Number:
Description:
ADAPTER ARM TARGET 14PIN RIBBON
Manufacturer:
Segger Microcontroller Systems
Datasheet:
Part Number:
Description:
JTAG EMULATOR FOR ARM CORES
Manufacturer:
Segger Microcontroller Systems
Datasheet:
Part Number:
Description:
JTAG EMULATOR FOR ARM CORES
Manufacturer:
Segger Microcontroller Systems
Datasheet:
Part Number:
Description:
PROGRAMMING TOOL FOR MCU
Manufacturer:
Segger Microcontroller Systems
Datasheet:
Part Number:
Description:
PROGRAMMING TOOL FOR ST7 MCU
Manufacturer:
Segger Microcontroller Systems
Datasheet:
Part Number:
Description:
PROGRAMMING TOOL FOR STM8
Manufacturer:
Segger Microcontroller Systems
Datasheet:
Part Number:
Description:
PROGRAMMER JTAG FOR ARM CORES
Manufacturer:
Segger Microcontroller Systems
Datasheet:
Part Number:
Description:
JTAG EMULATOR USB ETHERNET ARM
Manufacturer:
Segger Microcontroller Systems
Datasheet:
Part Number:
Description:
EMULATOR JTAG/SWD CORTEX M3
Manufacturer:
Segger Microcontroller Systems
Datasheet: