8.10.00 J-TRACE ARM Segger Microcontroller Systems, 8.10.00 J-TRACE ARM Datasheet - Page 184

• Manufacturer Part Number: 8.10.00 J-TRACE ARM
• Description: JTAG EMULATOR ARM7/ARM9 ETM
• Manufacturer: Segger Microcontroller Systems
• Type: Emulatorr

Specifications of 8.10.00 J-TRACE ARM

• Contents: Emulation Module
• For Use With/related Products: ARM7, ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 899-1006

184
8.4
J-Link / J-Trace (UM08001)
Some target boards only provide a 9-pin JTAG/
SWD connector for Cortex-M. For these devices
SEGGER provides a 20-pin -> 9-pin Cortex-M
adapter.
The following table lists the output of the 9-pin Cortex-M connector.
Table 8.10: 9-pin JTAG/SWD pinout
Pins 3 and 5 are GND pins connected to GND on the Cortex-M adapter. They should
also be connected to GND in the target system.
8
9
PIN
1
2
4
6
--- ---
9-pin JTAG/SWD connector
VTref
SWDIO/
TMS
SWCLK/TCK Output
SWO/TDO
TDI
NC
SIGNAL
Input
I/O /
output
Input
---
Output
NC
TYPE
This is the target reference voltage. It is used to check if
the target has power, to create the logic-level reference
for the input comparators and to control the output logic
levels to the target. It is normally fed from Vdd of the
target board and must not have a series resistor.
JTAG mode set input of target CPU. This pin should be
pulled up on the target. Typically connected to TMS of the
target CPU. When using SWD, this pin is used as Serial
Wire Output trace port. (Optional, not required for SWD
communication)
JTAG clock signal to target CPU. It is recommended that
this pin is pulled to a defined state of the target board.
Typically connected to TCK of the target CPU.
JTAG data output from target CPU. Typically connected to
TDO of the target CPU.
This pin (normally pin 7) is not existent on the 19-pin
JTAG/SWD and Trace connector.
JTAG data input of target CPU.- It is recommended that
this pin is pulled to a defined state on the target board.
Typically connected to TDI of the target CPU. For CPUs
which do not provide TDI (SWD-only devices), this pin is
not used. J-Link will ignore the signal on this pin when
using SWD.
Not connected inside J-Link. Leave open on target hard-
ware.
CHAPTER 8
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
Description
VTref
GND
GND
---
NC
3
5
7
9
1
Target interfaces and adapters
2
4
6
8
10
SWDIO / TMS
SWCLK / TCK
SWO / TDO
TDI
nRESET