8.10.00 J-TRACE ARM Segger Microcontroller Systems, 8.10.00 J-TRACE ARM Datasheet - Page 132

JTAG EMULATOR ARM7/ARM9 ETM

8.10.00 J-TRACE ARM

Manufacturer Part Number
8.10.00 J-TRACE ARM
Description
JTAG EMULATOR ARM7/ARM9 ETM
Manufacturer
Segger Microcontroller Systems
Type
Emulatorr

Specifications of 8.10.00 J-TRACE ARM

Contents
Emulation Module
For Use With/related Products
ARM7, ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
899-1006
132
5.11.1.1 device
5.11.1.2 DisableFlashBPs
5.11.1.3 DisableFlashDL
5.11.1.4 EnableFlashBPs
5.11.1.5 EnableFlashDL
5.11.1.6 map exclude
J-Link / J-Trace (UM08001)
This command selects the target device.
Syntax
device = <DeviceID>
DeviceID has to be a valid device identifier. For a list of all available device identifi-
ers please refer to chapter Supported devices on page 145.
Example
device = AT91SAM7S256
This command disables the FlashBP feature.
Syntax
DisableFlashBPs
This command disables the J-Link ARM FlashDL feature.
Syntax
DisableFlashDL
This command enables the FlashBP feature.
Syntax
EnableFlashBPs
This command enables the J-Link ARM FlashDL feature.
Syntax
EnableFlashDL
This command excludes a specified memory region from all memory accesses. All
subsequent memory accesses to this memory region are ignored.
Memory mapping
Some devices do not allow access of the entire 4GB memory area. Ideally, the entire
memory can be accessed; if a memory access fails, the CPU reports this by switching
to abort mode. The CPU memory interface allows halting the CPU via a WAIT signal.
On some devices, the WAIT signal stays active when accessing certain unused mem-
ory areas. This halts the CPU indefinitely (until RESET) and will therefore end the
debug session. This is exactly what happens when accessing critical memory areas.
Critical memory areas should not be present in a device; they are typically a hard-
ware design problem. Nevertheless, critical memory areas exist on some devices.
To avoid stalling the debug session, a critical memory area can be excluded from
access: J-Link will not try to read or write to critical memory areas and instead
ignore the access silently. Some debuggers (such as IAR C-SPY) can try to access
memory in such areas by dereferencing non-initialized pointers even if the debugged
program (the debuggee) is working perfectly. In situations like this, defining critical
memory areas is a good solution.
CHAPTER 5
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
Working with J-Link and J-Trace

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