HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 726

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 13 8-Bit Timers (TMR)
Table 13.2 Clock Input to TCNT and Count Condition
Channel
TMR_0
TMR_1
All
Note:
Rev.7.00 Mar. 18, 2009 page 658 of 1136
REJ09B0109-0700
* If the count input of TMR_0 is the TCNT_1 overflow signal and that of TMR_1 is the
TCNT_0 compare match signal, no incrementing clock is generated. Do not use this
setting.
Bit 2
CKS2
0
1
0
1
1
1
Bit 1
CKS1
0
1
0
0
1
0
0
1
TCR
Bit 0
CKS0
0
1
0
1
0
0
1
0
1
0
1
0
1
Description
Clock input disabled
Internal clock, counted at falling edge of φ/8
Internal clock, counted at falling edge of φ/64
Internal clock, counted at falling edge of φ/8192
Count at TCNT_1 overflow signal *
Clock input disabled
Internal clock, counted at falling edge of φ/8
Internal clock, counted at falling edge of φ/64
Internal clock, counted at falling edge of φ/8192
Count at TCNT_0 compare match A *
External clock, counted at rising edge
External clock, counted at falling edge
External clock, counted at both rising and falling edges

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