HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 702

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 12 Programmable Pulse Generator (PPG)
12.3.1
NDERH, NDERL enable or disable pulse output on a bit-by-bit basis. For outputting pulse by the
PPG, set the corresponding DDR to 1.
NDERH
Bit
7
6
5
4
3
2
1
0
NDERL
Bit
7
6
5
4
3
2
1
0
Rev.7.00 Mar. 18, 2009 page 634 of 1136
REJ09B0109-0700
Bit Name
NDER15
NDER14
NDER13
NDER12
NDER11
NDER10
NDER9
NDER8
Bit Name
NDER7
NDER6
NDER5
NDER4
NDER3
NDER2
NDER1
NDER0
Next Data Enable Registers H, L (NDERH, NDERL)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Next Data Enable 15 to 8
When a bit is set to 1, the value in the
corresponding NDRH bit is transferred to the
PODRH bit by the selected output trigger. Values
are not transferred from NDRH to PODRH for
cleared bits.
Description
Next Data Enable 7 to 0
When a bit is set to 1, the value in the
corresponding NDRL bit is transferred to the
PODRL bit by the selected output trigger. Values
are not transferred from NDRL to PODRL for
cleared bits.

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