HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 37

• Manufacturer Part Number: HD6412373R
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 14 Watchdog Timer (WDT)..................................................................677
14.1 Features .............................................................................................................................. 677
14.2 Input/Output Pin................................................................................................................. 678
14.3 Register Descriptions ......................................................................................................... 679
14.4 Operation............................................................................................................................ 682
14.5 Interrupt Source ................................................................................................................. 684
14.6 Usage Notes ....................................................................................................................... 684
Section 15 Serial Communication Interface (SCI, IrDA)..................................689
15.1 Features .............................................................................................................................. 689
15.2 Input/Output Pins ............................................................................................................... 692
15.3 Register Descriptions ......................................................................................................... 693
15.4 Operation in Asynchronous Mode ..................................................................................... 723
14.3.1 Timer Counter (TCNT)......................................................................................... 679
14.3.2 Timer Control/Status Register (TCSR) ................................................................. 679
14.3.3 Reset Control/Status Register (RSTCSR) ............................................................. 681
14.4.1 Watchdog Timer Mode ......................................................................................... 682
14.4.2 Interval Timer Mode ............................................................................................. 683
14.6.1 Notes on Register Access...................................................................................... 684
14.6.2 Contention between Timer Counter (TCNT) Write and Increment ...................... 686
14.6.3 Changing Value of CKS2 to CKS0....................................................................... 686
14.6.4 Switching between Watchdog Timer Mode and Interval Timer Mode................. 686
14.6.5 Internal Reset in Watchdog Timer Mode.............................................................. 687
14.6.6 System Reset by WDTOVF Signal....................................................................... 687
15.3.1 Receive Shift Register (RSR) ............................................................................... 694
15.3.2 Receive Data Register (RDR) ............................................................................... 694
15.3.3 Transmit Data Register (TDR).............................................................................. 694
15.3.4 Transmit Shift Register (TSR) .............................................................................. 695
15.3.5 Serial Mode Register (SMR)................................................................................. 695
15.3.6 Serial Control Register (SCR)............................................................................... 698
15.3.7 Serial Status Register (SSR) ................................................................................. 703
15.3.8 Smart Card Mode Register (SCMR) ..................................................................... 710
15.3.9 Bit Rate Register (BRR) ....................................................................................... 711
15.3.10 IrDA Control Register (IrCR) ............................................................................... 720
15.3.11 Serial Extension Mode Register (SEMR) ............................................................. 721
15.4.1 Data Transfer Format ............................................................................................ 723
15.4.2 Receive Data Sampling Timing and Reception Margin
15.4.3 Clock..................................................................................................................... 726
15.4.4 SCI Initialization (Asynchronous Mode) .............................................................. 727
15.4.5 Data Transmission (Asynchronous Mode)............................................................ 728
in Asynchronous Mode ......................................................................................... 725
Rev.7.00 Mar. 18, 2009 page xxxv of lxvi
REJ09B0109-0700