HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 496

• Manufacturer Part Number: HD6412373R
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 Data Transfer Controller (DTC)
Bit
5
4
3
2
1
0
Legend:
Rev.7.00 Mar. 18, 2009 page 428 of 1136
REJ09B0109-0700
× : Don’t care
Bit Name
DM1
DM0
MD1
MD0
DTS
Sz
Initial Value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
R/W
—
—
—
—
—
—
Description
Destination Address Mode 1 and 0
These bits specify a DAR operation after a data
transfer.
0×: DAR is fixed
10: DAR is incremented after a transfer
11: DAR is decremented after a transfer
DTC Mode
These bits specify the DTC transfer mode.
00: Normal mode
01: Repeat mode
10: Block transfer mode
11: Setting prohibited
DTC Transfer Mode Select
Specifies whether the source side or the
destination side is set to be a repeat area or block
area, in repeat mode or block transfer mode.
0: Destination side is repeat area or block area
1: Source side is repeat area or block area
DTC Data Transfer Size
Specifies the size of data to be transferred.
0: Byte-size transfer
1: Word-size transfer
(by +1 when Sz = 0; by +2 when Sz = 1)
(by –1 when Sz = 0; by –2 when Sz = 1)