HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 459

• Manufacturer Part Number: HD6412373R
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Transfer Requests from Multiple Channels in Auto Request Cycle Steal Mode: If transfer
requests for different channels are issued during a transfer in auto request cycle steal mode, the
operation depends on the channel priority. If the channel that made the transfer request is of higher
priority than the channel currently performing transfer, the channel that made the transfer request
is selected.
If the channel that made the transfer request is of lower priority than the channel currently
performing transfer, that channel’s transfer request is held pending, and the currently transferring
channel remains selected.
The selected channel begins transfer after the currently transferring channel releases the bus. If
there is a bus request from a bus master other than the EXDMAC at this time, a cycle for the other
bus master is initiated. If there is no other bus request, the bus is released for one cycle.
Figure 8.14 shows examples of transfer timing in cases that include auto request cycle steal mode.
φ
Address bus
EXDMA control
Channel 2
Channel 3
Figure 8.13 Example of Channel Priority Timing
Idle
Request
Request cleared
held
Channel 2
Selected
Channel 2 transfer
Request cleared
Channel 2
Channel 3
Rev.7.00 Mar. 18, 2009 page 391 of 1136
Section 8 EXDMA Controller (EXDMAC)
release
Bus
Channel 3 transfer
Channel 3
REJ09B0109-0700
release
Bus