HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 316

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 6 Bus Controller (BSC)
6.8.2
As with the basic bus interface, either program wait insertion or pin wait insertion using the WAIT
pin can be used in the initial cycle (full access) on the burst ROM interface. See section 6.5.4,
Wait Control. Wait states cannot be inserted in a burst cycle.
6.8.3
When a write access to burst ROM space is executed, burst access is interrupted at that point and
the write access is executed in line with the basic bus interface settings. Write accesses are not
performed in burst mode even though burst ROM space is designated.
Rev.7.00 Mar. 18, 2009 page 248 of 1136
REJ09B0109-0700
Wait Control
Write Access
Upper address bus
Lower address bus
Figure 6.64 Example of Burst ROM Access Timing
Note: n = 1 and 0
Data bus
CSn
RD
AS
(ASTn = 0, 1-State Burst Cycle)
φ
T
1
Full access
T
2
T
Burst access
1
T
1

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