HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 451

• Manufacturer Part Number: HD6412373R
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Caution is required when setting the repeat area overflow interrupt of the repeat area function in
block transfer mode. See section 8.4.6, Repeat Area Function, for details.
Block transfer is aborted if an NMI interrupt is generated. See section 8.4.12, Ending DMA
Transfer, for details.
Figure 8.8 shows an example of DMA transfer timing in block transfer mode.
8.4.6
The EXDMAC has a function for designating a repeat area for source addresses and/or destination
addresses. When a repeat area is designated, the address register values repeat within the range
specified as the repeat area. Normally, when a ring buffer is involved in a transfer, an operation is
required to restore the address register value to the buffer start address each time the address
register value is the last address in the buffer (i.e. when ring buffer address overflow occurs), but if
the repeat area function is used, the operation that restores the address register value to the buffer
start address is performed automatically within the EXDMAC.
The repeat area function can be set independently for the source address register and the
destination address register.
Transfer conditions:
EDREQ
EDRAK
Bus cycle
ETEND
· Single address mode
· BGUP = 0
· Block size (EDTCR[23:16]) = 3
Repeat Area Function
CPU
Figure 8.8 Example of Timing in Block Transfer Mode
CPU
CPU
EXDMAC
One-block transfer cycle
CPU cycle not generated
Rev.7.00 Mar. 18, 2009 page 383 of 1136
EXDMAC
Section 8 EXDMA Controller (EXDMAC)
EXDMAC
REJ09B0109-0700
CPU