HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 659

• Manufacturer Part Number: HD6412373R
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Example of Synchronous Operation: Figure 11.11 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to
2, TGRB_0 compare match has been set as the channel 0 counter clearing source, and
synchronous clearing has been set for the channel 1 and 2 counter clearing source.
Three-phase PWM waveforms are output from pins TIOCA0, TIOCA1, and TIOCA2. At this
time, synchronous presetting, and synchronous clearing by TGRB_0 compare match, is performed
for channel 0 to 2 TCNT counters, and the data set in TGRB_0 is used as the PWM cycle.
For details on PWM modes, see section 11.4.5, PWM Modes.
11.4.3
Buffer operation, provided for channels 0 and 3, enables TGRC and TGRD to be used as buffer
registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or a compare match register.
Table 11.28 shows the register combinations used in buffer operation.
TGRB_0
TGRB_1
TGRA_0
TGRB_2
TGRA_1
TGRA_2
H'0000
TIOCA_0
TIOCA_1
TIOCA_2
Buffer Operation
TCNT0 to TCNT2 values
Figure 11.11 Example of Synchronous Operation
Synchronous clearing by TGRB_0 compare match
Rev.7.00 Mar. 18, 2009 page 591 of 1136
Section 11 16-Bit Timer Pulse Unit (TPU)
REJ09B0109-0700
Time