HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 354

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 7 DMA Controller (DMAC)
Bit
5
4
Rev.7.00 Mar. 18, 2009 page 286 of 1136
REJ09B0109-0700
Bit Name
RPE
DTDIR
Initial Value
0
0
R/W
R/W
R/W
Description
Repeat Enable
Used in combination with the DTIE bit in DMABCR
to select the mode (sequential, idle, or repeat) in
which transfer is to be performed.
0: Transfer in sequential mode
1: Transfer in repeat mode
0: Transfer in sequential mode
1: Transfer in idle mode
Data Transfer Direction
Used in combination with the SAE bit in DMABCR
to specify the data transfer direction (source or
destination). The function of this bit is therefore
different in dual address mode and single address
mode.
0: Transfer with MAR as source address and IOAR
1: Transfer with IOAR as source address and MAR
0: Transfer with MAR as source address and DACK
1: Transfer with DACK pin as read strobe and MAR
as destination address
as destination address
pin as write strobe
as destination address
When DTIE = 0 (no transfer end interrupt)
When DTIE = 1 (with transfer end interrupt)
When SAE = 0
When SAE = 1

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