HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 409

• Manufacturer Part Number: HD6412373R
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

A byte or word transfer is performed for a single transfer request, and after the transfer, the bus is
released. While the bus is released, one or more bus cycles are executed by the CPU or DTC.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
Address bus
DACK
TEND
RD
φ
Figure 7.27 Example of Single Address Mode (Word Read) Transfer
release
Bus
DMA read
release
Bus
DMA read
Rev.7.00 Mar. 18, 2009 page 341 of 1136
release
Bus
Section 7 DMA Controller (DMAC)
DMA read
Last transfer
cycle
REJ09B0109-0700
DMA
dead
release
Bus