HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 911
HD6412373R
Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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20.5.3
EBR1 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Set only one bit in EBR1 and EBR2 together (do not set more than one bit at the
same time). Setting more than one bit will automatically clear all EBR1 and EBR2 bits to 0. For
details, see table 20.3.
Bit
7
6
5
4
3
2
1
0
Bit Name
EB7
EB6
EB5
EB4
EB3
EB2
EB1
EB0
Erase Block Register 1 (EBR1)
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Section 20 Flash Memory (0.35-μm F-ZTAT Version)
Description
When this bit is set to 1, 4 kbytes of EB7 are to be
erased.
When this bit is set to 1, 4 kbytes of EB6 are to be
erased.
When this bit is set to 1, 4 kbytes of EB5 are to be
erased.
When this bit is set to 1, 4 kbytes of EB4 are to be
erased.
When this bit is set to 1, 4 kbyte of EB3 is to be
erased.
When this bit is set to 1, 4 kbyte of EB2 is to be
erased.
When this bit is set to 1, 4 kbyte of EB1 is to be
erased.
When this bit is set to 1, 4 kbyte of EB0 is to be
erased.
Rev.7.00 Mar. 18, 2009 page 843 of 1136
REJ09B0109-0700
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