HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 17

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Item
16.4.7 Example of
Use
Figure 16.15 Sample
Flowchart for Master
Receive Mode
Figure 16.17 Sample
Flowchart for Slave
Receive Mode
16.7 Usage Notes
(3) I
(IIC2) master receive
mode
(4)
transfer rate setting
values when using I
bus interface 2 (IIC2) in
multi-master mode
(5) Limitations on use
of bit manipulation
instructions to set MST
and TRS when using I
bus interface 2 (IIC2) in
multi-master mode
2
Limitations on
C bus interface 2
2
C
2
C
Page
798
800
803
Revision (See Manual for Details)
Figure amended
Figure amended
Usage note added
No
Set ACKBT=0 in ICIER
Dummy read ICDRR
No
No
TDRE=0 ?
RDRF=1 ?
Set RCVD = 0 (ICCRA)
Clear ACKBT in ICIER
Set MST = 0 (ICCRA)
Read RDRF in ICSR
Clear STOP of ICSR
Read STOP of ICSR
Write BBSY = 0
Yes
Yes
Read ICDRR
and SCP = 0
RDRF=1 ?
STOP=1 ?
End
Yes
Yes
No
Rev.7.00 Mar. 18, 2009 page xv of lxvi
[2]
[3]
Slave transmit mode
[2] Set the acknowledge for the transmit device.
[3] Dummy read ICDRR.
[4] Wait the reception end of 1 byte.
[5] Judge the (last receive - 1).
[6] Read the received data, and clear RDRF to 0.
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
[14] Clear RCVD to 0.
[15] Clear ACKBT.
[16] Set slave receive mode.
REJ09B0109-0700

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