HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 277

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
A setting can be made in bits RCW1 and RCW0 in REFCR to delay RAS signal output by one to
three cycles. Use bits RLW1 and RLW0 in REFCR to adjust the width of the RAS signal. The
settings of bits RCW1, RCW0, RLW1, and RLW0 are valid only in refresh operations.
Figure 6.37 shows the timing when bits RCW1 and RCW0 are set.
φ
RTCNT
RTCOR
Refresh request
signal and CMF bit
setting signal
φ
CSn (RASn)
UCAS, LCAS
Figure 6.35 Compare Match Timing
Figure 6.36 CBR Refresh Timing
T
Rp
N
T
Rr
Rev.7.00 Mar. 18, 2009 page 209 of 1136
N
T
Rc1
Section 6 Bus Controller (BSC)
H'00
T
Rc2
REJ09B0109-0700

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