ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 87

• Manufacturer Part Number: ATMEGA8HVD-4MX
• Description: MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8HVD-4MX

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.4 V
• Data Converters: A/D 1x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 18-MLF® Exposed Pad (Staggered Leads), DFN
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -

16.10.2
16.10.3
16.10.4
16.10.5
8052B–AVR–09/08
TCNTnL – Timer/Counter n Register Low Byte
TCNTnH – Timer/Counter n Register High Byte
OCRnA – Timer/Counter n Output Compare Register A
OCRnB – Timer/Counter n Output Compare Register B
The Timer/Counter Register TCNTnL gives direct access, both for read and write operations,
to the Timer/Counter unit 8-bit counter. Writing to the TCNTnL Register blocks (disables) the
Compare Match on the following timer clock. Modifying the counter (TCNTnL) while the coun-
ter is running, introduces a risk of missing a Compare Match between TCNTnL and the
OCRnx Registers. In 16-bit mode the TCNTnL register contains the lower part of the 16-bit
Timer/Counter n Register.
When 16-bit mode is selected (the TCWn bit is set to one) the Timer/Counter Register
TCNTnH combined to the Timer/Counter Register TCNTnL gives direct access, both for read
and write operations, to the Timer/Counter unit 16-bit counter. To ensure that both the high
and low bytes are read and written simultaneously when the CPU accesses these registers,
the access is performed using an 8-bit temporary high byte register (TEMP). This temporary
register is shared by all the other 16-bit registers. See
page
The Output Compare Register A contains an 8-bit value that is continuously compared with
the counter value (TCNTnL). A match can be used to generate an Output Compare interrupt.
In 16-bit mode the OCRnA register contains the low byte of the 16-bit Output Compare Regis-
ter. To ensure that both the high and the low bytes are written simultaneously when the CPU
writes to these registers, the access is performed using an 8-bit temporary high byte register
(TEMP). This temporary register is shared by all the other 16-bit registers. See
Registers in 16-bit Mode” on page
The Output Compare Register B contains an 8-bit value that is continuously compared with
the counter value (TCNTnL in 8-bit mode and TCNTnH in 16-bit mode). A match can be used
to generate an Output Compare interrupt.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
82.
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
82.
R/W
R/W
R/W
R/W
4
0
TCNTnL[7:0]
4
0
4
0
4
0
TCNTnH[7:0]
OCRnA[7:0]
OCRnB[7:0]
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
”Accessing Registers in 16-bit Mode” on
ATmega4HVD/8HVD
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
”Accessing
TCNTnL
TCNTnH
OCRnA
OCRnB
87