ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 102

• Manufacturer Part Number: ATMEGA8HVD-4MX
• Description: MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8HVD-4MX

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.4 V
• Data Converters: A/D 1x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 18-MLF® Exposed Pad (Staggered Leads), DFN
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -

19.5
19.5.1
102
Register Description
ATmega4HVD/8HVD
ROCR – Regulator Operating Condition Register
V
Figure 19-2. Regulator Short-circuit Detection Example
• Bit 7 – ROCS: ROC Status
When the VFET voltage is below V
tion that the Voltage Regulator has entered the Battery Pack short mode (if RSCDEN is set) or
that the Voltage regulator is operating in FORCE mode (if RSCDEN is cleared).
• Bit 6:3 – Res: Reserved
These bits are reserved and will always read as zero.
• Bit 2 – RSCDEN: Regulator Short-Circuit Detection Enable
If this bit is set, the Voltage Regulator will enter the Battery Pack Short mode if VFET drops
below V
same condition. The ROCS bit can be used to indicate if VFET is above or below the V
threshold.
The RSCDEN bit should normally never be set when VFET is below V
eventually lead to a power-off condition when CREG has been discharged. For this reason,
the default value of RSCDEN is always 0. For the same reason, RSCDEN should always be
cleared when operating in DUVR mode. During charging, when VFET passes V
ROCS bit is cleared, the RSCDEN bit must be set to be able to sustain operation during short
spikes on VFET.
• Bit 1 – ROCWIF: ROC Warning Interrupt Flag
: The ROCWIF flag is set if RSCDEN is set and ROCS goes high. The bit can be cleared by
writing a logic '1' to its bit location.
• Bit 0 – ROCWIE: ROC Warning Interrupt Enable
Bit
Read/Write
Initial Value
DROP
V
V
V
BLOT, normal
FORCE+
FORCE-
2.2V
depends on actual current drawn from VREG.
FORCE
V
ROCS
. If the bit is cleared, the Voltage Regulator will enter FORCE mode under the
VFET
7
R
0
6
R
0
-
5
R
0
-
FORCE
, this bit is set. When this is set, it is either an indica-
4
R
0
-
R
3
0
-
RSCDEN
R/W
2
0
ROCWIF
R/W
1
0
FORCE
VREG
ROCWIE
R/W
FORCE+
since this will
0
0
8052B–AVR–09/08
t
and the
ROCR
FORCE