ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 45

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ATMEGA8HVD-4MX

Manufacturer Part Number
ATMEGA8HVD-4MX
Description
MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA8HVD-4MX

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.4 V
Data Converters
A/D 1x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
18-MLF® Exposed Pad (Staggered Leads), DFN
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
10.7
10.7.1
8052B–AVR–09/08
Watchdog Timer
Features
Figure 10-10. Watchdog Timer
ATmega4HVD/8HVD has an Enhanced Watchdog Timer (WDT). The WDT is a timer counting
cycles of the Slow RC Oscillator that runs at 131 kHz (typical value, see
istics” on page
a given timeout value. In normal operation mode, it is required that the system uses the WDR
- Watchdog Timer Reset - instruction to restart the counter before the timeout value is
reached. If the system doesn't restart the counter, an interrupt or system reset will be issued.
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be
used to wake the device from sleep-modes, and also as a general system timer. One example
is to limit the maximum time allowed for certain operations, giving an interrupt when the opera-
tion has run longer than expected. In System Reset mode, the WDT gives a reset when the
timer expires. This is typically used to prevent system hang-up in case of runaway code. The
third mode, Interrupt and System Reset mode, combines the other two modes by first giving
an interrupt and then switch to System Reset mode. This mode will for instance allow a safe
shutdown by saving critical parameters before a system reset.
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer to
System Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Inter-
rupt mode bit (WDIE) are locked to 1 and 0 respectively. To further ensure program security,
alterations to the Watchdog set-up must follow timed sequences. The sequence for clearing
WDE and changing timeout configuration is as follows:
Clocked from Slow RC Oscillator
3 Operating modes
Selectable Timeout period from 16 ms to 8s
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode
– Interrupt
– System Reset
– Interrupt and System Reset
142). The WDT gives an interrupt or a system reset when the counter reaches
WATCHDOG
RESET
OSCILLATOR
Slow RC
WDIF
WDIE
WDE
ATmega4HVD/8HVD
WDP0
WDP1
WDP2
WDP3
MCU RESET
INTERRUPT
”Electrical Character-
45

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