ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 100
ATMEGA8HVD-4MX
Manufacturer Part Number
ATMEGA8HVD-4MX
Description
MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8HVD-4MX.pdf
(168 pages)
Specifications of ATMEGA8HVD-4MX
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.4 V
Data Converters
A/D 1x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
18-MLF® Exposed Pad (Staggered Leads), DFN
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
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19. Voltage Regulator
19.1
19.2
100
Features
Overview
ATmega4HVD/8HVD
•
•
•
•
The Voltage Regulator is a linear regulator that nominally provides a fixed output voltage
(VREG). However, to facilitate efficient low-voltage operation with minimum voltage drop
caused by the regulator, voltage regulation is automatically switched off when VFET is below
V
is illustrated in
regulator switches from linear mode to FORCE mode, as VREG is being forced as close as
possible to VFET. The voltage drop from VFET to VREG in this mode depends on the load
current on VREG.
Figure 19-1. VREG/VCC as function of VFET
The Voltage regulator mode depending on operating conditions and SW settings, are summa-
rized in
Table 19-1.
VFET Voltage
VFET > V
VFET< V
VFET < V
FORCE
Linear regulation giving a fixed output voltage (VREG) of 2.2V for VFET > V
Output voltage forced as close as possible to VFET for VFET ≤ V
operation.
Regulator Short-circuit Detection (RSCD), disconnecting VFET from VREG if VFET drops below
the Regulator Short-Circuit Detection voltage (V
RSCD enabling/disabling in software
Short-circuit Detection
Regulator Mode
(see
Table
FORCE
FORCE
FORCE
V
BLOT, NORMAL
”Electrical Characteristics” on page
19-1.
Figure
V
FORCE
2.2V
V
Regular Short-circuit Detection
Enabled/Disabled
Enabled
Disabled
19-1. A discontinuity in VREG can be observed as the point where the
LINEAR
ENABLED
VREG
VFET
142). VREG as a function VFET and regulator
RSCD
)
FORCE
DISABLED
Regular mode
Normal Linear Regulation
Battery Pack Short mode
Force mode
FORCE
to facilitate low voltage
FORCE
OFF
8052B–AVR–09/08
t
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