ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 37

• Manufacturer Part Number: ATMEGA8HVD-4MX
• Description: MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8HVD-4MX

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.4 V
• Data Converters: A/D 1x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 18-MLF® Exposed Pad (Staggered Leads), DFN
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -

9.8.2
8052B–AVR–09/08
PRR0 – Power Reduction Register 0
Table 9-3.
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the pro-
grammer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one just before
the execution of the SLEEP instruction and to clear it immediately after waking up.
• Bit 7:6 - Res: Reserved bits
These bits are reserved for future use. For compatibility with future devices, these bits must be
written to zero when PRR0 is written.
• Bit 5 - PRVRM: Power Reduction Voltage Regulator Monitor
Writing a logic one to this bit shuts down the Voltage Regulator Monitor interface by stopping
the clock of the module.
• Bit 4 - Res: Reserved bits
This bit is reserved for future use. For compatibility with future devices, this bit must be written
to zero when PRR0 is written.
• Bit 3 - PRSPI: Power Reduction Serial Peripheral Interface
Writing a logic one to this bit shuts down the Serial Periperal Interface by stopping the clock to
the module.
• Bit 2 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the
Timer/Counter1 is enabled, operation will continue like before the shutdown.
• Bit 1 - PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the
Timer/Counter0 is enabled, operation will continue like before the shutdown.
• Bit 0 - PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. Before writing the PRADC bit, make sure
that the ADEN bit is cleared to minimize the power consumption.
Note:
Bit
Read/Write
Initial Value
SM2
ADC control registers can be updated even if the PRADC bit is set.
1
1
1
Sleep Mode Select (Continued)
R
7
0
-
R
6
0
-
SM1
0
1
1
PRVRM
R/W
5
0
R
4
0
-
SM0
1
0
1
PRSPI
R
3
0
ATmega4HVD/8HVD
Sleep Mode
Reserved
Reserved
Reserved
PRTIM1
R/W
2
0
PRTIM0
R/W
1
0
PRADC
R/W
0
0
PRR0
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