ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 138
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ATMEGA8HVD-4MX
Manufacturer Part Number
ATMEGA8HVD-4MX
Description
MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8HVD-4MX.pdf
(168 pages)
Specifications of ATMEGA8HVD-4MX
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.4 V
Data Converters
A/D 1x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
18-MLF® Exposed Pad (Staggered Leads), DFN
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
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24.8.5
24.8.6
24.8.7
24.8.8
24.8.9
24.8.10
138
ATmega4HVD/8HVD
Programming the EEPROM
Reading the Flash
Reading the EEPROM
Programming and Reading the Fuse and Lock Bits
Reading the Signature Bytes and Calibration Byte
Power-off sequence
Figure 24-4. High-voltage Serial Programming Waveforms
The EEPROM is organized in pages, see
EEPROM, the data is latched into a page buffer. This allows one page of data to be pro-
grammed simultaneously. The programming algorithm for the EEPROM Data memory is as
follows (refer to
1. Load Command “Write EEPROM”.
2. Load EEPROM Page Buffer.
3. Program EEPROM Page. Wait after Instr. 2 until SDO goes high for the “Page Pro-
4. Repeat 2 through 3 until the entire EEPROM is programmed or until all data has been
End Page Programming by Loading Command “No Operation”.
The algorithm for reading the Flash memory is as follows (refer to
1. Load Command "Read Flash".
2. Read Flash Low and High Bytes. The contents at the selected address are available at
The algorithm for reading the EEPROM memory is as follows (refer to
1. Load Command “Read EEPROM”.
2. Read EEPROM Byte. The contents at the selected address are available at serial out-
The algorithms for programming and reading the Fuse Low/High bits and Lock bits are shown
in
The algorithms for reading the Signature bytes and Calibration byte are shown in
Set SCI to “0”. Set RESET to “1”. Turn V
Table
gramming” cycle to finish.
programmed.
serial output SDO.
put SDO.
SDO
PB0
PB1
PB2
PB3
SDI
SCI
SII
24-14.
Table
0
MSB
MSB
MSB
1
24-14):
2
3
4
CC
Table 26-8 on page
power off.
5
6
7
LSB
LSB
LSB
8
148. When programming the
Table
9
Table
24-14):
10
24-14):
8052B–AVR–09/08
Table
24-14.
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