ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 22

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ATMEGA8HVD-4MX

Manufacturer Part Number
ATMEGA8HVD-4MX
Description
MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA8HVD-4MX

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.4 V
Data Converters
A/D 1x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
18-MLF® Exposed Pad (Staggered Leads), DFN
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
8. System Clock and Clock Options
8.1
8.1.1
8.1.2
8.1.3
8.1.4
22
Clock Systems and their Distribution
ATmega4HVD/8HVD
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
ADC Clock – clk
I/O
CPU
ADC
Figure 8-1
clocks need not be active at a given time. In order to reduce power consumption, the clocks to
modules not being used can be halted by using different sleep modes, as described in
Management and Sleep Modes” on page
Figure 8-1.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from perform-
ing general operations and calculations.
The I/O clock is used by the majority of the I/O modules. The I/O clock is also used by the
External Interrupt module, but note that some external interrupts are detected by asynchro-
nous logic, allowing such interrupts to be detected even if the I/O clock is halted.
The Flash clock controls operation of the Flash interface. The Flash clock is usually active
simultaneously with the CPU clock.
The ADC is provided with a dedicated clock domain. The ADC is automatically prescaled
according to the System Clock Prescaler's setting to provide a fixed clock frequency to the
FLASH
Oscillator
Oscillator Sampling
Slow RC
Interface
presents the principal clock systems in the AVR and their distribution. All of the
Clock Distribution
Watchdog Timer
CORE
CPU
Battery Protection
Ultra Low Power
RC Oscillator
clk
CPU
32. The clock systems are detailed below.
RAM
Reset Logic
FLASH and
EEPROM
clk
FLASH
Clock Control
System Clock
Oscillator
Prescaler
Fast RC
Prescaler
AVR
ADC
clk
Voltage
VADC
ADC
8052B–AVR–09/08
clk
Other I/O
Modules
I/O
”Power

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