ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 134
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ATMEGA8HVD-4MX
Manufacturer Part Number
ATMEGA8HVD-4MX
Description
MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8HVD-4MX.pdf
(168 pages)
Specifications of ATMEGA8HVD-4MX
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.4 V
Data Converters
A/D 1x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
18-MLF® Exposed Pad (Staggered Leads), DFN
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
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Table 24-10. Serial Programming Instruction Set (Continued)
Notes:
134
Instruction/Operation
Read Extended Fuse Bits
Read Calibration Byte
Write Instructions
Write Program Memory Page
Write EEPROM Memory
Write EEPROM Memory Page (page access)
Write Lock bits
Write Fuse bits
Write Fuse High bits
Write Extended Fuse Bits
1. Not all instructions are applicable for all parts.
2. a = address.
3. Bits are programmed ‘0’, unprogrammed ‘1’.
4. To ensure future compatibility, unused Fuses and Lock bits should be unprogrammed (‘1’) .
5. Refer to the correspondig section for Fuse and Lock bits, Calibration and Signature bytes and Page size.
6. Instructions accessing program memory use word address. This address may be random within the page range.
7. See htt://www.atmel.com/avr for Application Notes regarding programming and programmers.
ATmega4HVD/8HVD
(6)
If the LSB in RDY/BSY data byte out is ‘1’, a programming operation is still pending. Wait until
this bit returns ‘0’ before the next instruction is carried out.
Within the same page, the low data byte must be loaded prior to the high data byte.
After data is loaded to the page buffer, program the EEPROM page, see
135.
Byte 1
$4C
$C0
$C2
$AC
$AC
$AC
$AC
$50
$38
adr MSB
adr MSB
adr MSB
Byte 2
$E0
$A0
$A8
$A4
$08
$00
Instruction Format
adr LSB
adr LSB
adr LSB
Byte 3
$00
$00
$00
$00
$00
$00
Figure 24-2 on page
data byte out
data byte out
data byte in
data byte in
data byte in
data byte in
data byte in
8052B–AVR–09/08
Byte4
$00
$00
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