ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 130

• Manufacturer Part Number: ATMEGA8HVD-4MX
• Description: MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8HVD-4MX

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.4 V
• Data Converters: A/D 1x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 18-MLF® Exposed Pad (Staggered Leads), DFN
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -

24.2.2
24.2.3
24.3
130
Signature Bytes
ATmega4HVD/8HVD
Low Byte
Latching of Fuses
Note:
Table 24-4.
Notes:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
The fuse values are latched when the device enters programming mode and changes of the
fuse values will have no effect until the part leaves Programming mode. This does not apply to
the EESAVE Fuse which will take effect once it is programmed. The fuses are also latched on
Power-up in Normal mode.
All Atmel microcontrollers have a three-byte signature code which identifies the device. This
code can be read in both Programming mode, also when the device is locked. The three bytes
reside in a separate address space. The signature bytes of ATmega4HVD/8HVD is given in
Table
Table 24-5.
Part
ATmega4HVD
ATmega8HVD
Bit No
7
6
5
4
3
2
1
0
24-5.
1. The default OSCSEL1:0 setting should not be changed. OSCSEL1:0 = ‘00’ is reserved for
1. See
2. The SPIEN Fuse is not accessible in SPI programming mode.
3. See
Fuse Low Byte
WDTON
EESAVE
SPIEN
DWEN
SELFPRGEN
SUT2
SUT1
SUT0
test purposes. Other values are reserved for future use.
Fuse Low Byte
Device ID
Table 8-1 on page 23
”WDTCSR – Watchdog Timer Control Register” on page 48
(1)
(1)
(1)
(2)
(3)
Self Programming enable
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Enable SPI Programming Interface
Enable debugWIRE
Select start-up time
Select start-up time
Select start-up time
for details about start-up time.
Description
0x000
0x1E
0x1E
Signature Bytes Address
0x001
0x93
TBD
Default Value
1 (unprogrammed)
1 (unprogrammed, EEPROM
not preserved)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
for details.
8052B–AVR–09/08
0x002
0x12
TBD