ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 61

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ATMEGA8HVD-4MX

Manufacturer Part Number
ATMEGA8HVD-4MX
Description
MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA8HVD-4MX

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.4 V
Data Converters
A/D 1x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
18-MLF® Exposed Pad (Staggered Leads), DFN
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
14. Low Voltage I/O-Ports
14.1
8052B–AVR–09/08
Overview
All low voltage AVR ports have true Read-Modify-Write functionality when used as general
digital I/O ports. This means that the direction of one port pin can be changed without uninten-
tionally changing the direction of any other pin with the SBI and CBI instructions. The same
applies when changing drive value (if configured as output) or enabling/disabling of pull-up
resistors (if configured as input). All low voltage port pins have individually selectable pull-up
resistors with a supply-voltage invariant resistance. All I/O pins have protection diodes to both
VCC and Ground as indicated in
for a complete list of parameters.
Figure 14-1. Low Voltage I/O Pin Equivalent Schematic
Note:
All registers and bit references in this section are written in general form. A lower case “x” rep-
resents the numbering letter for the port, and a lower case “n” represents the bit number.
However, when using the register or bit defines in a program, the precise form must be used.
For example, PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The
physical I/O Registers and bit locations are listed in
Three I/O memory address locations are allocated for each low voltage port, one each for the
Data Register – PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The
Port Input Pins I/O location is read only, while the Data Register and the Data Direction Regis-
ter are read/write. However, writing a logic one to a bit in the PINx Register, will result in a
toggle in the corresponding bit in the Data Register. In addition, the Pull-up Disable – PUD bit
in MCUCR disables the pull-up function for all low voltage pins in all ports when set.
Using the I/O port as General Digital I/O is described in
I/O” on page
peripheral features on the device. How each alternate function interferes with the port pin is
described in
a full description of the alternate functions.
See
Figure 14-2 on page 62
”Alternate Port Functions” on page
Pxn
62. Many low voltage port pins are multiplexed with alternate functions for the
Figure
C
for details.
pin
14-1. Refer to
66. Refer to the individual module sections for
”Register Description” on page
”Electrical Characteristics” on page 142
ATmega4HVD/8HVD
”Low Voltage Ports as General Digital
R
pu
Logic
70.
61

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