ATMEGA8HVD-4MX Atmel, ATMEGA8HVD-4MX Datasheet - Page 41

• Manufacturer Part Number: ATMEGA8HVD-4MX
• Description: MCU AVR 8K FLASH 2.1-8V 4MHZ QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8HVD-4MX

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.4 V
• Data Converters: A/D 1x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 18-MLF® Exposed Pad (Staggered Leads), DFN
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -

8052B–AVR–09/08
guaranteed and the chip should be forced into Power-off mode. The algorithm used for switch-
ing between the two V
the V
Figure 10-4. BLOD levels switching
Notice that during the Power-On Reset start-up sequence, a Black-out detection will only gen-
erate a normal reset. The chip will not enter Power-off in this case. This is illustrated in
10-5 on page
Figure 10-5. BLOD detection with POR
In normal operation, when V
Reset is immediately activated. After a fixed delay of T
mode, see
ongoing operations, including EEPROM write sequences that were started while V
above V
A charger must be connected to start up the chip from Power-off.
The BLOD circuit will only detect a drop in V
longer than t
Figure 10-6. Black-out Reset During Operation
Internal Reset
BLOT, START-UP
Power-on
BLOD
Figure 10-6 on page 41
V
, will be aborted. The result of an ongoing EEPROM write operation will be invalid.
BLOD
CC
41. See TBD for details on Power-on Reset and start-up sequence.
given in
level will always be selected.
BLOT
V
V
BLOT, NORMAL
BLOT,STARTUP
BLOD
reset
”System and Reset Characteristics” on page
POR
levels is illustrated
REG
decreases to a value below the trigger level, the Black-out
V
and
BLOT
”System and Reset Characteristics” on page
0
1
S
R
REG
BLOD LEVEL
Figure 10-4 on page
if the voltage stays below the trigger level for
VREG
T BLODTOUT
ATmega4HVD/8HVD
BLODTOUT
DETECTION
BLOD_PWROFF
BLOD
the chip will enter Power-off
41. As long as BLOD is set,
BLOD
144.
144. Any
REG
Figure
was
41