R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 76

• Manufacturer Part Number: R5F21162SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/16r

Specifications of R5F21162SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
Figure 11.3
11.1.6
Interrupt Control Register
b7 b6 b5 b4 b3 b2 b1 b0
NOTES :
1.
2.
The following describes enable/disable the maskable interrupts and set the priority order to
acknowledge. The contents explained does not apply to the nonmaskable interrupts.
Use the I flag in the FLG register, IPL and the ILVL2 to ILVL0 bits in each interrupt control register to
enable/disable the maskable interrupts. Whether an interrupt is requested is indicated by the IR bit in
each interrupt control register.
Figure 11.3 shows the Interrupt Control Register and Figure 11.4 shows the INT0IC Register.
Only “0” can be w ritten to the IR bit. Do not w rite “ 1”.
To rew rite the interrupt control register, rew rite it w hen the interrupt request w hich is applicable for its register is not
generated. Refer to 20.2.6 Changing Interrupt Control Registers.
Jan 19, 2006
Interrupt Control
Interrupt Control Register
Bit Symbol
(b7-b4)
Symbol
ILVL0
ILVL1
ILVL2
KUPIC
ADIC
IIC2AIC
CMP1IC
S0TIC
S0RIC
TXIC
TZIC
INT1IC
INT3IC
TCIC
CMP0IC
Page 61 of 254
—
IR
(2)
Interrupt Priority Level Select Bit
Interrupt Request Bit
Nothing is assigned. When w rite, set to “0”.
When read, its content is indeterminate.
Address
Bit Name
005Ah
004Dh
004Eh
004Fh
0050h
0051h
0052h
0056h
0058h
0059h
005Bh
005Ch
b2 b1 b0
0 0 0 : Level 0 (interrupt disable)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
0 : Requests no interrupt
1 : Requests interrupt
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
After Reset
Function
11. Interrupt
RW
RW
RW
RW
RW
—
(1)