R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 194

IC R8C MCU FLASH 8K 20SSOP

R5F21162SP#U0

Manufacturer Part Number
R5F21162SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/16r
Datasheets

Specifications of R5F21162SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
16.3
Figure 16.6
16.4
Figure 16.7
When the SMP bit in the ADCON2 register is set to “1” (with sample and hold function), A/D conversion
rate per pin increases to 28 φ AD cycles for 8-bit resolution or 33 φ AD cycles for 10-bit resolution. The
sample and hold function is available in all operating modes. Start the A/D conversion after selecting
whether the sample and hold circuit is to be used or not.
When performing the A/D conversion, charge the comparator capacitor in the microcomputer.
Figure 16.6 shows the Timing Diagram of A/D Conversion.
Figure 16.7 shows the A/D Conversion Cycles.
Without Sample & Hold
Without Sample & Hold
With Sample & Hold
With Sample & Hold
Sample & Hold
Sample & Hold
Sample and Hold
A/D Conversion Cycles
Jan 19, 2006
A/D Conversion Mode
Disabled
Enabled
Timing Diagram of A/D Conversion
A/D Conversion Cycles
Sampling Time
Sampling Time
Conversion time at the 1st bit
Conversion time at the 1st bit
Page 179 of 254
4ø AD cycle
4ø AD cycle
10 bits
10 bits
8 bits
8 bits
Conversion
49φAD
59φAD
28φAD
33φAD
Time
Comparison
Comparison
Time
Time
Conversion time at the 1st bit
Sampling
4φAD
4φAD
4φAD
4φAD
Time
Sampling Time
at the 2nd bit
2.5ø AD cycle
Comparison
Time
Comparison
at the 2nd bit
* Repeat until conversion ends
2.0φAD
2.0φAD
2.5φAD
2.5φAD
Time
Comparison
Comparison
Time
Time
Conversion time at the 2nd
Sampling
0.0φAD
0.0φAD
2.5φAD
2.5φAD
Time
bit and the follows
Sampling Time
* Repeat until conversion ends
2.5ø AD cycle
Comparison
Time
Comparison
2.5φAD
2.5φAD
2.5φAD
2.5φAD
Time
Comparison
Time
16. A/D Converter
End process
End process
8.0φAD
8.0φAD
4.0φAD
4.0φAD

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