R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 216

• Manufacturer Part Number: R5F21162SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/16r

Specifications of R5F21162SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
18.4.1
18.4.2
The microcomputer enters CPU rewrite mode and software commands can be acknowledged by
setting the FMR01 bit in the FMR0 register to “1” (CPU rewrite mode enabled). In this case, since the
FMR11 bit in the FMR1 register is set to “0”, EW0 mode is selected.
Use software commands to control a program and erase operations. The FMR0 register or the status
register can determine status when program and erase operation complete.
When entering an erase-suspend, set the FMR40 bit to “1” (enables erase-suspend) and the FMR41
bit to “1” (requests erase-suspend). Wait for td(SR-ES) and ensure that the FMR46 bit is set to “1”
(enables reading) before accessing the user ROM area. The auto-erase operation restarts by setting
the FMR41 bit to “0” (erase restarts).
The microcomputer enters EW1 mode by setting the FMR11 bit to “1” (EW1 mode) after setting the
FMR01 bit to “1” (CPU rewrite mode enabled).
The FMR0 register can determine status when program and erase operation complete. Do not
execute the read status register command in EW1 mode.
To enable the erase-suspend function, execute the block erase command after setting the FMR40 bit
to “1” (enables erase-suspend). The interrupt to enter an erase-suspend should be in interrupt
enabled status. After passing td(SR-ES) since the block erase command is executed, an interrupt
request is acknowledged.
When an interrupt request is generated, the FMR41 bit is automatically set to "1" (requests erase-
suspend) and the auto-erase operation is halted. If the auto-erase operation does not complete
(FMR00 bit is “0”) when the interrupt process completes, the auto-erase operation restarts by setting
the FMR41 bit to “0” (erase restarts).
Jan 19, 2006
EW0 Mode
EW1 Mode
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18. Flash Memory Version