R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 45

IC R8C MCU FLASH 8K 20SSOP

R5F21162SP#U0

Manufacturer Part Number
R5F21162SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/16r
Datasheets

Specifications of R5F21162SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
Figure 6.6
Voltage Monitor 2 Circuit Control Register
b7 b6 b5 b4
NOTES :
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Set the PRC3 bit in the PRCR register to “1” (rew rite enable) before w riting to this register.
When rew riting the VW2C register, the VW2C2 bit may be set to “1”. Set the VW2C2 bit to “0” after rew riting the
VW2C register.
When the voltage monitor 2 interrupt is used to exit stop mode and to return again, w rite “0” to the VW2C1
bit before w riting “1”.
This bit is enabled w hen the VCA27 bit in the VCA2 register is set to “1” (voltage detection 2 circuit
enabled).
Set this bit to “0” by a program. When w riting “0” by a program, it is set to “0” (It remains unchanged even if it is set
to “1”).
This bit is enabled w hen the VW2C0 bit is set to “1” (voltage monitor 2 interrupt / enables reset).
The VW2C0 bit is enabled w hen the VCA27 bit in the VCA2 register is set to “1” (voltage detection 2 circuit
enabled). Set the VW2C0 bit to “0” (disable) w hen the VCA27 bit is set to “0” (voltage detection 2 circuit disabled).
The VW2C7 bit is enabled w hen the VW2C1 bit is set to “1” (digital filter disabled mode).
The VW2C2 and VW2C3 bits remain unchanged in the softw are reset, w atchdog timer reset and voltage monitor 2
reset.
When the VW2C6 bit is set to “1” (voltage monitor 2 reset mode), set the VW2C7 bit to “1” (w hen VCC
reaches to Vdet2 or below )(do not set to “0”).
Set the VW2C0 bit to “0” (disabled) under the conditions of the VCA13 bit in the VCA1 register set to “1” (VCC ≥
Vdet2 or voltage detection 2 circuit disabled), the VW2C1 bit set to “1” (digital filter disabled mode) and the VW2C7
bit set to “0” (w hen VCC reaches Vdet2 or above).
Set the VW2C0 bit to “0” (disabled) under the conditions of the VCA13 bit set to “0” (VCC < Vdet2), the VW2C1 bit
set to “1” (digital filter disabled mode) and the VW2C7 bit set to “1” (w hen VCC reaches Vdet2 or below ).
Jan 19, 2006
b3
b2
VW2C Register
b1 b0
Bit Symbol
VW2C0
VW2C2
VW2C3
VW2C6
VW2C7
VW2C1
VW2F0
VW2F1
Symbol
VW2C
Page 30 of 254
Voltage Monitor 2 Interrupt /
Reset Enable Bit
Voltage Monitor 2 Digital Filter
Disabled Mode Select Bit
Voltage Change Detection
Flag
WDT Detection Flag
Sampling Clock Select Bit
Voltage Monitor 2 Circuit Mode
Select Bit
Voltage Monitor 2 Interrupt /
Reset Generation Condition
Select Bit
(3,4,8)
(5)
(7,9)
Address
Bit Name
(1)
0037h
(6, 10)
(4,8)
(2)
b5 b4
0 0 : fRING-S divide-by-1
0 1 : fRING-S divide-by-2
1 0 : fRING-S divide-by-4
1 1 : fRING-S divide-by-8
0 : Disable
1 : Enable
0 : Digital filter enabled mode
1 : Digital filter disabled mode
0 : Not detected
1 : Vdet2 pass detected
0 : Not detected
1 : Detected
0 : Voltage monitor 2 interrupt mode
1 : Voltage monitor 2 reset mode
0 : When VCC reaches Vdet2 or above
1 : When VCC reaches Vdet2 or below
(digital filter circuit enabled)
(digital filter circuit disabled)
After Reset
Function
00h
6. Voltage Detection Circuit
(8)
RW
RW
RW
RW
RW
RW
RW
RW
RW

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